This course is intended to teach: Architecture and performance of modern processors, performance metrics; instruction set architectures and their impact on performance; instruction and arithmetic pipelines; pipeline hazards; exception handling; caches.
Integral to the course is a Project Laboratory. Working in teams, students are expected to design and implement a processor based on a given specification of a simple instruction set. Student's progress is determined through a preliminary design review, a presentation, demonstration of the implementation and a final report.
Classes: Tue, Wed, Fri 10:30- 11:20, CLE 115
Mon 2:30pm - 5:30pm, ELWB 328,
|Office: EOW 441|
|Office hours: Only by Appointment|
|Four One-hour Quiz Exams||25%|
Students will pass the course ONLY if they get a passing grade (more than 50%) in all three components.
Note: Quiz #4 is scheduled for Wednesday April 1st in class.