HDLC Compare



Overview

HDLC Compare compares data bytes from the Input Queue and the FCS register to determine whether or not bytestuffing is applicable.



HDLC Compare Functionality

A data byte received from either the Frame Check Sequence (FCS) or the Input Queue is compared with a control byte sequence. The Control Escape octet is defined as binary 0111 1101 (hexadecimal 0x7d).

This is shown above. If the comparison is true, the compareStuff flag is set. This means that the byte sent out in hdlcDataByte requires bytestuffing. If the comparison is false then bytestuffing is not required. A HDLC Compare state diagram is also available.

Delay Counter

The delayCounter is used to delay data being dequeued from the Input Queue while data is still being processed in HDLC Processing. If the eof signal is not asserted by the Input Queue, then timeToWait is set to eight. If the eof signal is asserted by the Input Queue, then timeToWait is set to twelve. The extra time accrues because the last byte of data plus the FCS must be processed before data from the Input Queue is again deQueued. Therefore data bytes from the Input Queue are processed every eight clock pulses (delayCount less than and equal to eight) and data bytes from the FCS are processed in four clock pulses (delayCount from eight to twelve).

End of Frame in Queue

Processing occurs while an complete frame is available from the Input Queue (eofInQueue is true). If an end of frame was not present and data was processed without being complete the data would be incomplete and thus corrupted. As long as at least one eof signal is present within the Input Queue data will continue to be processed.