The Queue Handlers do not keep track of STM-16 frame timing and thus require a controller to signal when the current STM-16 frame is coming to an end. As well, the write_HDLC_byte signal and HDLC_data_byte signals coming from the HDLC Framer to the Virtual Container Processor must be routed to the correct Queue Handler. All this is the task of the Queue Handler Controller.
The Queue Handler Controller monitors how much time is left in the current STM-16 frame. It also receives a signal called VC_complete_flg from each Queue Handler that specifies whether that Queue Handler has completed processing the active queue. The combination of this information allows the Controller to ascertain when it should stop accepting additional HDLC frame information and concentrate on processing the remaining unprocessed queues. The means by which this is implemented is depicted and described below.
The Queue Handler Controller receives a flag from each queue called VC_complete_flg that indicates if that queue has finished processing its active queue for the next STM-16 frame. These flags then propagate through an encoder that converts these 16 incoming indicators to a binary value between 0 and 16. If the number is 16, ie. all 16 queues have been processed, the All_VCs_complete_flg is asserted because the binary value for 16 is 10000. However, if the number is less than 16, there are still queues that have not been processed and further action is required.
Once is has been ascertained that there is still one or more queues to be processed, the binary number from the encoder is used as an index to a table. For example, an index of 14, indicating that fourteen queues have been processed and only two remain, will index the time required to process two queues completely. Similarly, an index of 1 will point to the time required to process 15 queues completely.
The time remaining in the current STM-16 frame is then subtracted from the indexed time in the table and if the result is less than or equal to zero then the remaining active queues must be processed at that point. The controller then forces the processing of these final queues.
When time runs out for filling queues with HDLC frames, the active queues are processed regardless of whether they contain a complete HDLC frame or they are empty. When the current STM-16 frame finishes, the controller indicates to the Queue Handlers that they should switch their active and inactive queues. The controller can also indicate to the HDLC framer that the current HDLC frame should be dropped if it exceeds 2340 bytes. In addition, the HDLC framer can be paused if all 16 active queues currently contain an HDLC frame.
The state machine that dictates the value of a number of these controller signals can be seen below.