The Memory Control System

Memory Module Problem Solution

The memory portion of the design must be able to store incoming packets from the input controller. Secondly, the Memory portion of the design must be able to inform the Input controller where the packet is being stored. Specifically, giving the input controller the memory number and address location of the packet in the memory. Thirdly, the memory portion of the design must be able to receive an address of a packet from the output controller and return the packet, which is stored at that address location, to the output controller.

Memory Module Design Solution

The memory portion of the design is broken into three distinct modules:

Controller Unit

The memory controller is the heart of the memory module. The controller is responsible for controlling the address memory and the data memory. The functionality of the controller will be broken up into two distinct tasks, writing a packet into the memory and reading a packet from memory.

Writing to Memory

The memory controller will receive a packet from the input controller. Once the memory controller has received the packet from the input controller, it has to store the packet. Therefore, the memory controller has to get a free memory location from the address memory. Upon receiving a valid free memory location from the address memory, the memory controller will send the valid address value to the data memory. This will allow the packet received from the input controller to be written to the data memory.

The memory controller will also have to update the address memory to reflect the fact that the free address location just read from the address memory is no longer free.

When a packet is written to the data memory, the memory controller must inform the input controller where the packet was written to in the data memory.

Reading from Memory

The memory controller will receive an address from the output controller. This address corresponds to a particular packet stored in the data memory, which the output controller wants. Therefore, the memory controller will have to send that address to the data memory and read the packet stored at that address location. Upon reading the packet from the data memory, the memory controller will have to send the packet to the output controller and update the address memory to reflect the fact that address location, which was just read in the data memory, is free.

Address Memory

The address memory stores all the possible address locations in the data memory.

Each available data memory address location in the address memory has a flag to indicate whether the address location is free or is currently being used.

Data Memory

The data memory stores all the received packets from the input controller. When required, the packets can be read from the data memory. The memory can store a total of 256 packets.

Here are some Block Diagrams