Progress

 

April 2001:    The team was formed and discussions with Dr. Elguibaly surrounding our project were started.

May 2001:    Final project idea  was selected.  It was decided to undertake a complete design of a Fast Multi-Port Memory system for a High-Speed Network Switch.  Initial version for our system specifications was started.

June 2001:    The specifications for our design were set out and approved by our supervisor.  Currently, the team has fully started designing the system.  This initial design phase, including pseudo-code, has been completed.  The team is in the stage of working with VHDL in developing our memory system.

July 2001:     The team has been developing the VHDL source code throughout the month of July.  They have finished coding each of the 4 components of the design.  Testing is under way and completion is expected on time.  Presentation preparations are under way.

August 2001:     The team has finished the design.  All 4 components have been tested and are complete.  Results are positive, each component can perform all of the tasks as set out in the objectives.  The presentation was also a success.  The team is currently finishing up their technical report and the company website.

Please stay tuned as this page will be updated periodically to reflect our progress.  Last updated: August 2, 2001.

RAM Memory Solutions, 2001