Department of Electrical and Computer Engineering

CENG 465 / CENG 441 / ELEC 543

DIGITAL OF DIGITAL AND VLSI SYSTEMS

COURSE OUTLINE and ASSESSMENT TECHNIQUES

Objectives

The goal of the course is to introduce architecture and design concepts underlying modern complex VLSI systems. The lectures build upon students prior knowledge of digital circuits, digital logic, and computer architecture concepts to teach how complex chip-scale systems can be designed. The labs give the student the chance to apply the concepts learned in the lectures towards design of actual subsystems all the way from specification to modeling then synthesis.

Instructor:

Office Hours:

      
Dr. Fayez Gebali
       Days: By appointment


Phone: 721-8941
 
Time: 9:30-10:20



Email: fayez at ece dot uvic dot ca

Location: ELW A236








Lectures:

Labs:

                   


Section(s): K01

Section (s) Day(s) Time

Days: M

LS02
 M
 3:30-6:30PM

Time: 10:30 - 11:20

LS03
 T
 2:30-5:30PM

Location: DSB C118         


















Optional Text:

Optional Text:


Title: Application-Specific Integrated Circuits

Title: The Student's Guide to VHDL


Author: Michael John Sebastian Smith

Author: P. J. Ashenden


Publisher: Addison-Wesley Publishing Company

Publisher: Morgan Kaufmann Publishers


Year: 1997

Year: 1998


ISBN:  0-201-50022-1

ISBN: 1-55860-520-7









Class notes and lectures slides





Available from the course web page





Bring each lecture's slides with you to class.











References:





N/A











Assessment:

CENG 465 / CENG 441

ELEC 543

Assignment: 

10%
 10 %

Labs*:

15%
 N/A

Projects

N/A
 15%

Mid-term (date: 14 June):

25%
 25%

Final:

50%
 50%







Due Dates for Assignments:





TBD





*Note: Failure to complete all laboratory requirements will result in a grade of N being awarded for the course.

Calendar Entry

CENG 465/ELEC 543 (1.5) Digital VLSI Systems

Overview of VLSI technology, VLSI design methodology and design options. System design, simulation, and synthesis using hardware description languages (e.g. VHDL). Ad-hoc and structured design for testability techniques. System design examples from communications and computer arithmetic. CMOS circuit and logic design. Graduate students are required to complete a project.

Prerequisites: CENG 290 or CSC 355 or equivalent, and fourth year standing.

Grade Conversion

The final grade obtained from the above marking scheme will be based on the following Faculty of Engineering percentage-to-grade point conversion:
 
90  <=  A+ <=  100  
85 <=  A <  90  
80 <=  A- < 85  
75 <=  B+ < 80  
70 <=  B < 75  
65 <=  B- < 70  
60 <=  C+ < 65  
55 <=  C < 60  
50 <=  D < 55  
35 <=  E < 50 Fail, conditional supplemental exam* - for undergraduate courses only (e.g., CENG 465).
    F < 35 Fail, no supplemental exam.
    N     Fail, did not write examination or otherwise complete course requirements by the end of the term or session; no supplemental exam.

*   The rules for supplemental examinations are found on page 73 of the current 2004/05 Calendar.

For courses taken in Application Deadline for Supplemental Exam Supplemental Exam Date
January – April June 30 First week of classes in September-December term
May – August October 30 First week of classes in January-April term
September – December February 28 First week of classes in May-August term


Refer to page 73 of the calendar for deferred examinations.  Deferred examination schedules use the same dates as supplementals in the table above.

Syllabus

The course covers the following areas:
  1. Introduction to digital VLSI systems.
  2. Introduction to ASICs.
  3. System design, simulation, and synthesis using VHDL.
  4. Programmable ASICs.
  5. VLSI design methodology and design options.
  6. Ad-hoc and structured design for testability techniques.

Posting of Grades

The Department of Electrical and Computer Engineering will no longer post grades.  Students may access their grades via the Internet at: http://www.uvic.ca/reco and selecting WebView (Student Records On-Line).

Guidelines on Religious Observances

  1. Where classes or examinations are scheduled on the holy days of a religion, students may notify their instructors, at least two weeks in advance, of their intention to observe the holy day(s) by absenting themselves from classes or examinations.
  2. Instructors will provide reasonable opportunities for such students to make up work or missed examinations.
  3. Students will cooperate by accepting the provision of reasonable opportunities for making up work or missed examinations.
  4. The University Secretary's Office will distribute a multi-faith calendar to each academic unit annually.

Commitment to Inclusivity and Diversity

The University of Victoria is committed to promoting, providing and protecting a positive, supportive and safe learning and working environment for all its members.

Standards for Professional Behavior

You are advised to read the Faculty of Engineering document Standards for Professional Behaviour at http://www.engr.uvic.ca/policy/professional-behaviour.html which contains important information regarding conduct in courses, labs, and in the general use of facilities.


Cheating, plagiarism and other forms of academic fraud are taken very seriously by both the University and the Department. You should consult http://web.uvic.ca/calendar2004/FACS/UnPr/UARe/PoAcI.html for the UVic policy on academic integrity.
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