Nikitas Dimopoulos
Conference Publications




126.     Parra-Hernandez, R., E. M. Laxdal, N. J. Dimopoulos, P. Alexiou and V. J. Demopoulos “Validation Results for a Neural Network Ensemble Predictor of Aldose Reductase Inhibitory Activity” 18th EuroQSAR Symposium, Rhodes, September 2010.

125.     N. Agarwal, and N.J. Dimopoulos   “Improved FSMD Partitioning for Low Power Using Plackett-Burman” Proceedings, 53rd IEEE Int'l Midwest Symposium on Circuits & Systems, Seattle, August 2010.

124.     F. Khunjush and N. J. Dimopoulos “Characterization of Single-Port and Multi-Port Collective Communication Operations on the Cell BE Processor”  Proceedings, PACRIM 2009 IEEE Pacific Rim Conference on Communications Computers and Signal Processing pp. 624-630, Victoria, BC, Aug. 23-26, 2009.

123.     N. Agarwal, and N.J. Dimopoulos   “Towards Automated FSMD Partitioning for Low Power using Simulated Annealing” in N. Dimopoulos, S. Wong, C. Silvano, K. Bertels (eds.) Embedded Computer Systems: Architectures, Modeling and Simulation, LNCS 5657, pp. 108-117, Springer Verlag, 2009

122.     F. Khunjush and N. J. Dimopoulos Architectural Enhancement for Minimizing Message Delivery Latency on Cache-Less Architectures (e.g., Cell BE) presented at the Workshop on The Influence of I/O on Microprocessor Architecture (IOM-2009), Raleigh, North Carolina, February 15, 2009 (berkeley.intel-research.net/iom-2009)

121.     F. Khunjush and N. J. Dimopoulos, “Extended Characterization of DMA Transfers on the Cell BE Processor,'' Proceedings, HIPS '08 the 13th International Workshop on High-Level Parallel Programming Models and Supportive Environments, held in conjunction with IPDPS 2008, DOI 10.1109/IPDPS.2008.4536190 Miami, USA, April 14-18, 2008

120.     N. Agarwal, and N.J. Dimopoulos  “FSMD partitioning for low power using simulated annealing” Proceedings, ISCAS 2008. IEEE International Symposium on Circuits and Systems, pp. 1244-1247.  Seattle, WA, May 18-21, 2008.

119.     N. Agarwal, and N.J. Dimopoulos. “FSMD Partitioning for Low Power Using ILP” Proceedings, ISVLSI '08 IEEE Computer Society Annual Symposium on VLSI, pp. 63-68, Montpellier, France, April 7-9, 2008.

118.     Vanderster, D.C., N.J. Dimopoulos, and R.J. Sobie “Intelligent Selection of Fault Tolerance Techniques on the Grid” Proceedings 3rd IEEE International Conference on e-Science and Grid Computing, pp. 69-76 , Bangalore, India, Dec. 10-13, 2007.

117.     Agarwal, N. and N. J. Dimopoulos “High Level Fixed Point VLSI Design with Automated Clock Gating” Proceedings, PACRIM 2007 IEEE Pacific Rim Conference on Communications Computers and Signal Processing pp. 359-362, Victoria, BC, Aug. 22-24, 2007.

116.     Khunjush, F. and N.J. Dimopoulos “Comparing Direct-to-Cache Transfer policies to TCP/IP and M-VIA during Receive Operations in MPI environments” Proceedings, ISPA 2007 the Fifth International Symposium on Parallel and Distributed Processing and Applications, pp. 208-222, Niagra Falls, Canada, August 29-31, 2007.

115.     Vanderster, D.C., A. Baniasadi, N.J. Dimopoulos. “Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters” in Choi, Lynn; Paek, Yunheung; Cho, Sangyeun (Eds.) Advances in Computer Systems Architecture Proceedings of the Twelfth Asia-Pacific Computer Systems Architecture Conference (ACSAC 2007), LNCS 4697 Springer Verlag 2007, pp. 175-185,

114.     Agarwal, N. and N. J. Dimopoulos  “Automatic Power Gating of Registers using CoDeL and FSM Branch Prediction” in S. Vassiliadis, M. Berekovic, T. Hämäläinen (eds.) Embedded Computer Systems: Architectures, Modeling and Simulation, LNCS 4599, Springer Verlag, 2007, pp. 294-303

113.     Agarwal, N. and N. J. Dimopoulos  “Towards Automated Power Gating of Registers using CoDeL” Proceedings ISCAS 2007 IEEE International Symposium on Circuits and Systems, pp. 1629-1632, New Orleans, May 27-30, 2007.

112.     Vanderster, D.C., and N. Dimopoulos “Improved Grid Metascheduler Design using the Plackett-Burman Methodology” Proceedings, HPCS 2007 21st International Symposium on High Performance Computing Systems and Applications, pp. 9-9, Saskatoon, May 13-16, 2007.

111.     Agarwal, N. and N. J. Dimopoulos  “A DSPstone Benchmark of CoDeL’s Automated Clock Gating Platform” Proceedings, ISVLSI 200, IEEE Computer Society Annual Symposium on VLSI, pp. 508-509, Porto Alegre, March 9-11, 2007

110.     Khunjush, F. and N.J. Dimopoulos “Using the Cell Processor as a Network assist to minimize Latency” 
Proceedings, 2007 Canadian Conference on Electrical and Computer Engineering, pp. 936 – 939, Vancouver, April 22-26, 2007.

109.     Vanderster, D.C., N.J. Dimopoulos, and R.J. Sobie. “Metascheduling Multiple Resource Types using the MMKP”. Proceedings, 7th IEEE/ACM International Conference on Grid Computing, pp. 231-237, Barcelona, Sep. 2006

108.     Vanderster, D.C. and N. J. Dimopoulos “Sensitivity Analysis  of Knapsack-based Task Scheduling on the 
Grid” Proceedings, ICS 2006 - The 20th International Conference on Supercomputing, pp. 317-323,  Cairns, June 2006

107.     Agarwal, N. and N. J. Dimopoulos  “Efficient Automated Clock Gating Using CoDeL” in S. Vassiliadis, S. Wong, T. D. Hämäläinen (eds.) Embedded Computer Systems: Architectures, Modeling and Simulation, LNCS 4017, Springer Verlag, 2006, pp. 79-88.

106.     Agarwal, N. and N. J. Dimopoulos  “Power Efficient Rapid Hardware Development using CoDeL and Automated Clock Gating” Proceedings. ISCAS 2006 IEEE International Symposium on Circuits and Systems, pp. 5307 – 5310, Kos, Greece, May 2006.

105.     Vanderster, D.C., N. J. Dimopoulos, R. Parra-Hernandez, and R. Sobie “Evaluation of Knapsack-based Scheduling using the NPACI JOBLOG” Proceedings, 20th International Symposium on High-Performance Computing in an Advanced Collaborative Environment, pp. 15-15, May 2006.

104.     Khunjush, F. and N.J. Dimopoulos “Lazy DirecttoCacheTransfer during Receive Operations in a Message Passing Environment” Proceedings, 2006 ACM International Conference on Computing Frontiers, pp. 331-340, Ischia, Italy May 2006.

103.     Parra-Hernandez, R., E. M. Laxdal, N. J. Dimopoulos and P. Alexiou “ A New Neural Network Ensemble Heuristic for a Predictor of the Aldose Reductase Inhibitory Activity”, Proceedings ISPAS 2005 IEEE International Symposium on Signal Processing and Information, pp. 838-843, Athens, Greece, Dec. 2005.

102.     Neville, S. and N. J. Dimopoulos "Optimal Fault Detection for Coarsely Quantized Systems" Proceedings, 2005 Annual International Conference on Systems, Man and Cybernetics pp. 151 - 157 Vol. 1,  Hawaii, Oct. 2005.

101.     F. Khunjush and N. J. Dimopoulos, “Evaluation of Direct-to-Cache Transfer during Receive operations in a Message Passing Environment”, Proceedings, the Second Workshop on Advanced Networking and Communications Hardware, ANCHOR 2005, held in conjunction with ISCA-32, pp. 22-29, Wisconsin, USA, Jun 2005.

100.     F. Khunjush and N. J. Dimopoulos, “Hiding Message Delivery and Reducing Memory Access Latency by providing Direct-to-Cache Transfer during Receive Operations in a Message Passing Environment”, Proceedings, the Sixth Workshop on Memory Performance: Dealing with Applications, Systems, and Architecture, MEDEA 2005, held in Conjunction with PACT05, St. Louis, USA, pp. 43-50 September 2005.

99.       F. Khunjush and N. J. Dimopoulos,"Architectural Enhancements for Message Passing Interconnects", ACACES 2005, Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems. L‡quila, July 25-29, pp. 231-235. Academic Press, ISBN 90 382 0802 2.

98.       Agarwal, N. and N.J. Dimopoulos "Rapidly Prototyping DSP Extensions Using CoDeL: The DWT Using Lifting" Proceedings of the 2005 Canadian Conference on Electrical and Computer Engineering, pp. Saskatoon, May, 2005.

97.       Parra-Hernandez, R., E. M. Laxdal, N. J. Dimopoulos and P. Alexiou "A Neural Network-based Prediction Model of AR Inhibitory Activity from a Sparse Set of Compounds" Proceedings, 2005 International Joint Conference on Neural Networks, pp. 2411-2416 Montreal, Aug. 2005

96.       N. Agarwal and N. J. Dimopoulos "Power Efficient Rapid System Prototyping Using CoDeL: The 2D DWT using Lifting" Proceedings, 2005 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, pp. 550-553 Victoria, Aug. 2005

95.       N. Agarwal, and N. Dimopoulos "Using CoDeL to rapidly prototype Network Processor Extensions", in A. D. Pimentel and S. Vassiliadis (eds.) Computer Systems: Architectures, Modeling and Simulation, LNCS 3133, Springer Verlag, 2004, pp. 323-342

94.       Rafael Parra-Hernandez, Erik M. Laxdal and Nikitas J. Dimopoulos "Guided Construction of Training Data Set for Neural Networks" Proceedings 2004 Annual International Conference on Systems, Man and Cybernetics, pp. 5905-5910, Oct. 2004.

93.       R. Parra-Hernandez, D. Vanderster and N. J. Dimopoulos "Resource Management and Knapsack Formulations in the Grid" Proceedings, Fifth IEEE/ACM International Workshop on Grid Computing, pp. 94-101 Nov. 2004

92.       Khunjush, F., M.W. El-Kharashi, K.F. Li, and N.J. Dimopoulos, "Network Processor Design: Issues and Challenges" Proceedings, 2003 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing pp. 164-168, Victoria, Aug. 2003.

91.       Somers, C., N.J. Dimopoulos, and S. Neville, "Cable Network Fault Detection using Cable Modem Status Signals" Proceedings, 2003 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing pp. 422-425, Victoria, Aug. 2003.

90.       Parra-Hernandez, R., and N.J. Dimopoulos, "On the Performance of the Ant Colony System for Solving the Multidimensional Knapsack Problem" Proceedings, 2003 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing pp. 338-341, Victoria, Aug. 2003.

89.       Laxdal, E.M., and N.J. Dimopoulos, "A Novel Approach to Fault Classification Using Sparse Sets of Exemplars" Proceedings, 2003 IJCNN, International Joint Conference on Neural Networks pp. 2673-2678, Portland OR, July 2003.

88.       Sivakumar, R., V. Dimakopoulos, and N.J. Dimopoulos, "CoDeL: A Rapid Prototyping Environment for the Specification and Automatic Synthesis of Controllers for Multiprocessor Interconnection Networks", ", in A. D. Pimentel and S. Vassiliadis (eds.) Computer Systems: Architectures, Modeling and Simulation, LNCS 3133, Springer Verlag, 2004, pp. 78-87

87.       Parra-Hernandez, R., and N.J. Dimopoulos, "Channel Resource Allocation/Reallocation in Cellular Communication and the Multiple-choice Multidimensional Knapsack Problem" Proceedings, Annual International Conference on Systems, Man and Cybernetics, pp.2983-2989, 2003.

86.       Afsahi A. and N.J. Dimopoulos, "Architectural Extensions to Support Efficient Communication Using Message Prediction", Proceedings, 16th Annual International Symposium on High Performance Computing Systems and Applications, HPCS2002 pp. 20-27, June 2002.

85.       Afsahi, A. and N.J. Dimopoulos, "Communication Prediction in Message-Passing Multiprocessors" in N.J. Dimopoulos and K.F. Li (eds) High Performance Computing Systems and Applications pp. 253-271 Kluwer Academic Publishers, 2002.

84.       Afsahi, A. and N.J. Dimopoulos, "Efficient communication using message prediction for cluster of multiprocessors", 4th Workshop on Communication, Architecture and Applications for Network-based Parallel Computing, CANPC Õ00, held in conjunction with the 6th International Symposium on High-performance Computer Architecture, HPCA-6, Toulouse, France, January 8, 2000.

83.       Schoorl, A.P. and N.J. Dimopoulos, "Client mobility and fault tolerance in a distributed network data system", Proceedings of 1999 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM Õ99), Victoria, BC, Canada, August 23-25, 1999.

82.       Schoorl, A.P., N.P. Kourounakis, C.D.A. Somers and N.J. Dimopoulos, "Using statistics and neural networks in fault determination", Proceedings of the 1999 IEEE Canadian Conference on Electrical and Computer Engineering, Edmonton, AB, May 9-12, 1999.

81.       Afsahi, A. and N.J. Dimopoulos, "Communication latency hiding in reconfigurable message-passing environments: quantitative studies", Proceedings of High-performance Computing Systems and Applications, Kingston, ON, 1999.

80.       Afsahi, A. and N.J. Dimopoulos, "Hiding communication latency in reconfigurable message-passing environments", accepted for presentation at the 2nd Merged Symposium IPPS / SPDP 1999, 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, San Juan, Puerto Rico, Apr. 12-16, 1999.

79.       Kourounakis, N.P., S.W. Neville and N.J. Dimopoulos, "Neural network fault detection for the reverse pilot of cable television networks", Proceedings of LlSÕ98, 8th IFAC / IFORS / IMACS / IFIP Symposium on Large Scale Systems: Theory and Applications, University of Patras, Greece, July1998.

78.       Neville, S.W. and N.J. Dimopoulos, "Wavelet de-noising of coarsely quantized signals", 1998 IEEE Symposium on Advances in Digital Filtering and Signal Processing, Victoria, BC, Canada, June 5-6, 1998.

77.       Kourounakis, N.P., S.W. Neville and N.J. Dimopoulos, "Comparison of the use of neural networks versus statistical models in fault detection for cable television networks", 1998 IEEE Symposium on Advances in Digital Filtering and Signal Processing, Victoria, BC, Canada, June 5-6, 1998.

76.       Afsahi, A., and N.J. Dimopoulos, "Communications latency hiding techniques a reconfigurable optical interconnect: Benchmark studies", in B. Kagstrom, J. Dongarra, Elmroth and J. Wasnienwski (editors), Applied Parallel Computing, 4th Workshop, PARA Õ98, Lecture Notes in Computer Science, No. 1541, Springer-Verlag, Berlin, 1998.

75.       Kourounakis, N.P., S. Neville and N.J. Dimopoulos, "Early fault detection in cable television networks (the case of the reverse pilot)", Proceedings of the 1997 IEEE Pacific Rim Conference on Communications Computers and Signal Processing, Victoria BC, pp. 551-554, Aug. 1997.

74.       Kosmatopoulos, E.B., and N.J. Dimopoulos, "On the selection of nodes in linear in-the-weight neural networks", Proceedings on CD-ROM of the 5th IEEE Mediterranean Symposium on Control and Systems, paper no. 69, Paphos, Cyprus, July 21-23, 1997; and in the Proceedings of the 1997 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, Victoria BC, pp. 786-789, Aug. 1997.

73.       Afsahi, A., and N.J. Dimopoulos, "Collective communications on a reconfigurable optical interconnect", in A. Bui, M. Bui, V. Villain (eds.), Proceedings of the 1997 International Conference on Principles of Distributed Systems, HermŽs, Paris, pp. 167-181, 1997.

72.       Dorocicz, J.T., E. Kosmatopoulos, S. Neville and N.J. Dimopoulos, "Recurrent neural networks in system modelling and error detection", M. Jamshidi, M. Fathi, F. Pierrot (Eds.), Soft Computing with Industrial Applications Recent Trends in Research and Development, TSI Press, Albuquerque, NM, vol. 5, pp. 147-154, 1996.

71.       Kosmatopoulos, E., J.T. Dorocicz, N.J. Dimopoulos, S. Neville, A. Watkins and K.F. Li, "Reccurent neural networks in modelling and fault detection of the forward pilot in main trunk amplifiers", Proceedings, CCTA 39th Annual Convention and CABLEXPO, Edmonton, AB, pp. 21-28, June 1996.

70.       Dorocicz, J., E. Kosmatopoulos, S. Neville and N.J. Dimopoulos, "Recurrent neural networks for fault detection", Proceedings of the 4th IEEE Mediterranean Symposium on New Directions in Control and Automation, Chania, Greece, pp. 17-22, June 10-14, 1996.

69.       Dimakopoulos, V.V., and N.J. Dimopoulos, "Decomposition of total exchange for multidimensional networks", Proceedings of the 1996 International Conference on Parallel Processing, Aug. 1996.

68.       Dimakopoulos, V.V., and N.J. Dimopoulos, "Leaf communications in complete trees", L. BougŽ, P. Fraigniaud, A. Mignotte, Y. Robert (eds.), Euro-Par Õ96 Parallel Processing, Lecture Notes in Computer Science #1123, pp. 347-352, Springer Verlag, 1996.

67.       Dimakopoulos, V.V., and N.J. Dimopoulos, "Total exchange in Cayley networks", L. BougŽ, P. Fraigniaud, A. Mignotte, Y. Robert (eds.), Euro-Par Õ96 Parallel Processing, Lecture Notes in Computer Science #1123, pp. 341-346, Springer Verlag, 1996.

66.       Dimopoulos, N.J., R. Sivakumar and V.V. Dimakopoulos, "A rapid prototyping environment for the specification and automatic synthesis of controllers for interconnection routers", 29th Annual Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, pp. 193-198, Oct. 1995.

65.       Neville, S.W., and N.J. Dimopoulos, "Techniques for confident and reliable fault detection in large scale engineering plants", Proceedings, 1995 IEEE International Conference on Systems, Man, and Cybernetics, Vancouver, BC, pp. 1807-1812, Oct. 1995.

64.       Dimopoulos, N.J., S. Neville, J.T. Dorocicz and C. Jubien, "Training asymptotically stable recurrent neural networks" Proceedings of the 1995 IEEE International Conference on Systems Man and Cybernetics, Vancouver, BC, pp. 4392-4397, Oct. 1995.

63.       Escalante, M., N.J. Dimopoulos, D. Gurov and H. Muller, "Timing analysis for synthesis of hardware interface designs using timed signal transition graphs", Proceedings 6th International Workshop on Petri Nets and Performance Models, Duke University, Durham, North Carolina, Oct. 1995.

62.       Dimakopoulos, V.V., and N.J. Dimopoulos, "Leaf communications in trees and fat trees", Proceedings of the International Conference on Parallel and Distributed Computing Systems, Florida, USA, pp. 383-388, Sep. 1995.

61.       Escalante, M.A., and N.J. Dimopoulos, "Assessing the feasibility of interface designs before their implementation", Proceedings of ASO-DACÕ95 Asian and South Pacific Design Automation Conference, Makuhari Messe, Japan, Aug. 1995.

60.       Dimopoulos, N.J., and S. Neville, "Asymptotically stable recurrent neural networks and their use, an overview", Proceedings 3rd IEEE Mediterranean Symposium on New Directions in Control and Automation, Limassol, Cyprus, pp. 307-314, July 1995.

59.       Escalante, M.A., and N.J. Dimopoulos, "A probabilistic timing analysis for synthesis in microprocessor interface design", Proceedings IEEE Pacific Rim Conference on Communications Computers and Signal Processing, Victoria BC, pp. 277-280, May 1995.

58.       Chowdhury, M.H., and N.J. Dimopoulos, "A simulation model for performance analysis of routing algorithms in concurrent systems under realistic load", Proceedings IEEE Pacific Rim Conference on Communications Computers and Signal Processing, Victoria BC, pp. 525-529, May 1995.

57.       Sivakumar, R., V.V. Dimakopoulos and N.J. Dimopoulos, "Design of a programmable controller for hypercycle based interconnection networks", Proceedings of FPDÕ95, the 3rd Canadian Workshop on Field-Programmable Devices, Montreal, Quebec, Canada, pp. 212-217, May 1995.

56.       Dimopoulos, N.J., S. Neville, A. Watkins, K.F. Li and E.G. Manning, "Fault diagnosis in cable television networks", Proceedings of the 38th Annual Convention of the Canadian Cable Television Association, Halifax NS, pp. 69-75, May 1995.

55.       Dimakopoulos, V. V., and N.J. Dimopoulos, "Optimal Total Exchange in Linear Arrays and Rings", Proceedings of the 1994 International Symposium on Parallel Architectures, Algorithms and Networks, Kanazawa, Japan, pp. 230-237, Dec. 1994.

54.       Escalante, M.A., and N.J. Dimopoulos, "Timing Analysis for Synthesis in Microprocessor Interface Design", Proceedings of the 7th International Symposium on High Level Synthesis, Niagara on the Lake, pp. 23-28, May 18-20, 1994.

53.       Dimopoulos, N.J., S. Neville, A. Watkins, K.F. Li and E.G. Manning, "Neural Networks in Fault Identification in Large Communication Networks", Proceedings of the 2nd IEEE Mediterranean Symposium on New Directions in Control and Automation, Maleme, Crete, Greece, pp. 25-31, June 19-22, 1994.

52.       Dimopoulos, N.J., A. Watkins, S. Neville and K.F. Li, "An expert network analyzer: knowledge acquisition fault diagnosis and prediction", presented at the 1993 DND Workshop on Advanced Technologies in Knowledge Based Systems and Robotics, Ottawa, Canada, Nov. 14-17, 1993.

51.       Escalante, M.A., and N.J. Dimopoulos, "Timed asynchronous interface design in microprocessor-based systems", presented at Proceedings 1993 Canadian Conference on VLSI, Banff, Canada, Nov. 14-16, 1993.

50.       Dimopoulos, N.J., and R. Sivakumar, "Deadlock preventing routing for hypercycles", Proceedings of the International Workshop on Principles of Parallel Computing, pp. 47-61, Nov. 23-26, 1993, Lacanau, France and Proc. of the 1993 Canadian Conference on VLSI, Banff, Canada, pp. 7-75/7-80, Nov. 14-16, 1993.

49.       Huber, B., K.F. Li, N.J. Dimopoulos and E.G. Manning, "Data transfer interface design in DAME", Proceedings IEEE Pacific Rim Conference on Communications Computers and Signal Processing, pp. 510-513, May 1993.

48.       Huber, B., K.F. Li , N.J. Dimopoulos, M. Escalante and E.G. Manning, "Modeling data transfer signal timings in DAME", Proceedings IEEE Pacific Rim Conference on Communications Computers and Signal Processing, pp. 505-509, May 1993.

47.       Sivakumar, R., and N.J. Dimopoulos, "A 1.2mm CMOS deadlock-free router for hypercycle networks", Proceedings IEEE Pacific Rim Conference on Communications Computers and Signal Processing, pp. 153-156, May 1993.

46.       Watkins, A., N.J. Dimopoulos, S. Neville and K.F. Li, "Flowtool: A procedural-knowledge acquisition tool", Proceedings IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, pp. 31-34, May 1993.

45.       Rontogiannis, A., and N.J. Dimopoulos, "A probabilistic approach for reducing the search cost in binary decision trees", Proceedings IEEE Pacific Rim Conference on Communications Computers and Signal Processing, pp. 27-30, May 1993.

44.       Jubien, C.M., and N.J. Dimopoulos, "Recurrent neural networks in systems identification", Proceedings 1993 IEEE International Symposium on Circuits and Systems, pp. 2458-2461, May 1993.

43.       Jubien, C.M., and N.J. Dimopoulos, "Identification of a PUMA-560 two link robot using a stable neural network", Proceedings 1993 International Conference on Neural Networks, Apr. 1993.

42.       Escalante, M.A., N.J. Dimopoulos, D.M. Miller, K.F. Li and E.G. Manning, "The implementor subsystem in DAME: using OASIS to complete the design automation of microprocessor-based systems", Proceedings of the 1992 Canadian Conference on VLSI, Halifax, Nova Scotia, Oct. 1992.

41.       Dimopoulos, N.J., K.F. Li, A. Watkins, S. Neville and A. Rontogiannis, "An expert network analyzer", Proceedings of the 35th Canadian Cable Television Association Annual Convention, pp. 123-127, June, 1992.

40.       Dimopoulos, N.J., M. Chowdhury and R. Sivakumar, "Routing in hypercycles: Deadlock free and backtracking strategies", Proceedings of Parallel Architectures and Languages Europe '92, Paris, France, pp. 973-974, June 1992.

39.       Escalante, M.A., B. Huber, N.J. Dimopoulos, K.F. Li, D. Li and E.G. Manning, "Bus arbitration modelling and design in DAME: An expert microprocessor-based-systems design" Proceedings, 4th International Symposium on Artificial Intelligence, Cancun, Mexico, pp. 238-244, Nov. 1991.

38.       Sivakumar, R., N.J. Dimopoulos, V. Dimakopoulos, M. Chowdhury and D. Radvan, "Implementation of the routing engine for hypercycle based interconnection networks", Proceedings Canadian Conference on VLSI, Kingston, Ont., pp. 6.4.1-6.4.7, Aug. 1991.

37.       Escalante, M.A., N.J. Dimopoulos, B. Huber, K.F. Li, D. Li and E.G. Manning, "Generic design rules for the design of microprocessor based systems in DAME: Bus arbitration subsystem", Proceedings, 1991 IEEE International Symposium on Circuits and Systems, Singapore, pp.3166-3169, June 1991.

36.       Dimopoulos, N.J., S. Radhakrishnan and D. Radvan, "Routing and processor allocation on a hypercycle-based multiprocessor", Proceedings of the 1991 International Conference on Supercomputing, Cologne, Germany, pp. 105-114, June 1991.

35.       Sivakumar, R., N.J. Dimopoulos and K.F. Li, "VLSI design of a modulo-extractor", Proceedings of the 1991 Pacific Rim Conference on Communications Computers and Signal Processing, Victoria, BC, pp. 327-330, May 1991.

34.       Dimopoulos, N.J., R. Sivakumar, V. Dimakopoulos, M. Chowdhury and D. Radvan, "Hypercycles: A status report", Proceedings of the 1991 Pacific Rim Conference on Communications Computers and Signal Processing, Victoria, BC, pp. 111-114, May 1991.

33.       Dimopoulos, N.J., K.F. Li, E.G. Manning, B. Huber, M. Escalante, D. Li and D. Caughey, "DAME: An expert microprocessor-based-systems-designer. An overview and status report", Proceedings of the 1991 Pacific Rim Conference on Communications Computers and Signal Processing, Victoria, BC, pp. 388-391, May 1991.

32.       Radvan, D., N.J. Dimopoulos and R. Sivakumar, "Implementation for hypercycle-based interconnection networks", Proceedings of the Canadian Conference on Electrical and Computer Engineering, Ottawa, pp. 67.2.1-67.2.4, Sept. 1990.

31.       Huber, B., M. Escalante, D. Caughey, N.J. Dimopoulos, K.F. Li, D. Li and E.G. Manning, "Microprocessor components and signal behavior modelling in DAME", Proceedings of the Canadian Conference on Electrical and Computer Engineering, Ottawa, pp. 19.4.1-19.4.4, Sept. 1990.

30.       Dimopoulos, N.J., B. Huber, K.F. Li, D. Caughey, M. Escalante, D. Li, R. Burnett and E.G. Manning, "Modelling components in DAME", Proceedings of the 3rd International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, Charleston, South Carolina, vol. II, pp. 716-725, Jul. 1990.

29.       Dimopoulos, N.J., D. Radvan and W.A. Keddy, "Learning in asymptotically behaving neural networks", Proceedings of the 1990 International Joint Conference on Neural Networks, San Diego CA, vol. III, pp. 233-238, June 1990.

28.       Dantu, R.V., N.J. Dimopoulos, R.V. Patel and A.J. Al-Khalili, "Perception using blurring and its application in VLSI wafer probing", in Robotics and Manufacturing Recent Trends In Research, Education, and Applications, (Mohammad Jamshidi and Mehrdad Saif Eds)vol. 3, pp. 161-168, ASME Press Series, 1990.

27.       Dimopoulos, N.J., D. Radvan and K.F. Li, "Evaluation of the backtrack to the origin and retry routing for hypercycle based interconnection networks", Proceedings of the 10th International Conference on Distributed Systems, Paris, France, pp. 278-284, June 1990.

26.       Huber, B., K.F. Li, N.J. Dimopoulos, D. Li, D. Caughey and E.G. Manning, "Modelling signal behavior in DAME - A rule-based designer of microprocessor-based systems", Proceedings of the 1990 International Symposium on Circuits and System, New Orleans, pp. 1497-1500, May 1990.

25.       Dantu, R.V., N.J. Dimopoulos, R.V. Patel and A.J. Al-Khalili, "Algorithms for VLSI wafer probing", Proceedings of SPIE International Conference on Automated Visual Inspection and High Speed Vision Architectures, Philadelphia PA, vol. 1197, pp. 54-65, Nov. 1989.

24.       Dimopoulos, N.J., D. Radvan and K.F. Li, "Backtrack on the origin and retry routing for hypercycle based interconnection networks", Proceedings of the Canadian Conference on Electrical and Computer Engineering, Montreal, P.Q., pp. 967-971, Sept. 1989. (essentially identical to paper #23).

23.       Dimopoulos, N.J., D. Radvan and K.F. Li, "Backtrack to the origin and retry routing for hypercycle based interconnection networks", Proceedings of 1989 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, Victoria, BC, pp. 173-177, June 1989.

22.       Dimopoulos, N.J., K.F. Li and E.G. Manning, "DAME: A rule based designer of microprocessor based systems", Proceedings of 2nd International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, Tullahoma, TN, pp. 486-492, June 1989.

21.       Dimopoulos, N.J., K.F. Li and E.G. Manning, "DAME: A rule based designer of microprocessor based systems", Proceedings of 1989 IEEE International Symposium on Circuits and Systems, pp. 574-577, Portland, Oregon, May 1989.

20.       Li, K.F., and N.J. Dimopoulos, "An overview of distributed application support on the homogeneous multiprocessor", Proceedings of 1988 Can. Conf. on Electrical and Computer Engineering, Vancouver, BC, pp. 443-446, Nov. 1988.

19.       Dimopoulos, N.J., R.D. Rasmussen, G.S. Bolotin, B.F. Lewis and R.M. Manning, "Hypercycles inter-connection networks with simple routing strategies", Proceedings of 1988 Can. Conf. on Electrical and Computer Engineering, Vancouver, BC, pp. 577-580, Nov. 1988.

18.       Phung, V.P.T., and N.J. Dimopoulos, "Throughput analysis of a collision free protocol for local areas networks", Proceedings of 13th Conf. on Local Area Networks, Minneapolis, MN, Oct. 1988.

17.       Dantu, R.V., N.J. Dimopoulos, R.V. Patel and A.J. Al-Khalili, "Micro-manipulator vision in IC manufacturing", Proceedings of 1988 IEEE Int. Conf. on Robotics and Automation, Philadelphia, PA, pp. 1455-1460, Apr. 1988.

16. R   asmussen, R.D., N.J. Dimopoulos, G.S. Bolotin, B.F. Lewis and R.M. Manning, "MAX: Advanced general purpose real time multicomputer for space applications", Proceedings of 1987 Real Time Systems Symp., San Jose, CA, pp. 70-78, Dec. 1987.

15.       Rasmussen, R.D., G.S. Bolotin, N.J. Dimopoulos, B.F. Lewis and R.M. Manning, "Advanced general purpose multicomputer for space applications", Proceedings of 1987 Int. Conf. on Parallel Processing, St. Charles, IL, pp. 54-57, Aug. 1987.

14.       Dimopoulos, N.J., K.F. Li, E.C.W. Wong, D.V. Ramanamurthy and J.W. Atwood, "The homogeneous multiprocessor system: an overview", Proceedings of 1987 Int. Conf. on Parallel Processing, St. Charles, IL, pp. 592-599, Aug. 1987.

13.       Li, K.F., N.J. Dimopoulos and J.W. Atwood, "Support for distributed data structures in the homogeneous multiprocessor", Proceedings of 2nd Int. Conf. on Computers and Applications, Beijing, China, pp. 104-110, June 1987.

12.       Li, K.F., N.J. Dimopoulos and J.W. Atwood, "Operating system support for distributed applications on the homogeneous multiprocessor", in proc. 2nd Int. Conf. on Supercomputing, Santa Clara, CA, vol. 1, pp. 466-474, May 1987.

11.       Li, K.F., N.J. Dimopoulos and J.W. Atwood, "An operating system design for the homogeneous multiprocessor", in Proc. Int. Computer Symp. 1986, Tainan, Taiwan, pp. 72-81, Dec. 1986.

10.       Dimopoulos, N.J., and H.C. Lee, "Experiments in designing with DAME: Design automation of microprocessor based systems using an expert systems approach", in Proc. Int. Computer Symp. 1986, Tainan, Taiwan, pp. 1858-1867, Dec. 1986.

9.         Ramanamurthy, D.V., N.J. Dimopoulos, K.F. Li, R.V. Patel and A.J. Al-Khalili, "Parallel algorithms for low level vision on the homogeneous multiprocessor", in Proc. IEEE Computer Society Conf. on Computer Vision and Pattern Recognition (CVPR 86), Miami Beach, pp. 421-423, June 1986.

8.         Dimopoulos, N.J., C.H. Lee and N. Galatis, "DAME: automated design of microprocessor based systems - an expert systems approach", in Proc. Can. Conf. on Industrial Computer Systems, Montreal, pp. 20-1/20-7, May 1986.

7.         Dimopoulos, N.J., "The homogeneous multiprocessor architecture-structure and performance analysis", in Proc. 1983 Int. Conf. on Parallel Processing, pp. 520-523, Aug. 1985.

6.         Dimopoulos, N.J., and C.W. Wong, "Performance evaluation of the H-network through simulation", in Digital Techniques in Simulation, Communication and Control, (S. Tzafestas, Ed.), Elsevier Science Publishers B.V., North Holland, pp. 315-320, 1985.

5.         Dimopoulos, N.J., K.F. Li and C.W. Wong, "Simulation and performance of the homogeneous multiprocessor", in Proc. 1984 Summer Computer Simulation Conf., Boston, MA, pp. 139-144, July 1984.

4.         Dimopoulos, N.J., "The homogeneous multiprocessor: its architecture and relation to structure of certain neural networks", in Proc. of the 26th Midwest Symp. on Circuits and Systems, Puebla, Mexico, Aug. 1983.

3.         Dimopoulos, N.J., and D. Kehayas, "The H-network - high speed distributed packet switching local computer network", in Proc. MELECON '83 Mediterranean Electrotechnical Conf., Athens, Greece, pp. Al.02, May 1983.

2.         Dimopoulos, N.J., "A study of the asymptotic behaviour of neural networks", in Proc. 1982 IEEE Int. Symp. on Circuits and Systems, Rome, pp. 280-283, May 1982.

1.         Dimopoulos, N. J., and R.W. Newcomb "Stability properties of a class of large scale neural networks" in Proc. 1980 IEEE Int. Symp. On Circuits and Systems, Houston, TX. Pp. 528-530, Apr. 1980.